They say, “Designing microprocessors is hard, expensive, and takes years.” But does it have to? We say, “No.”
Codasip was founded on a simple belief – we could bring together the brilliance of microprocessor architects and software engineers and capture it in tools that made design simpler, faster, and less expensive. The company was created in 2014 with the mission of democratizing processor design. Nowadays Codasip is a leading supplier of processing solutions for IC designers, offering products based on open standards such as the RISC-V ISA, LLVM, and UVM.
High Level Synthesis team (led by Honza Bartůšek) is working on our EDA tool, Codasip Studio, which provides help to our customers and IP engineers with RISC-V processors design. The team is currently searching for an RTL Design Engineer who will be responsible for RTL prototypes of the processor units.
- Create RTL prototypes of the processor units in Codasip Studio (memory, cache, TCM, OCD, trace, etc.)
- Work with AMBA buses (AHB, AXI, ACE)
- Participate in the development of our commercial processor cores
- Revise internal processors´ prototypes in the CodAL language
- Extend on-chip debugger according to RISC-V Debug/Nexus /JTAG specification
- Synthesize RTL code, analyze results, optimize
- Work with tools for RTL code verification
- Optimize and reduce energy consumption (low power)
- 2 years of experience (university internship in IT/electro fields could be a good background as well)
- Advanced knowledge of at least one HDL language (VHDL/Verilog/SystemVerilog)
- Active usage of HW synthesis tools for ASIC/FPGA (e.g.Xilinx ISE, Xilinx Vivado, Synopsys DC, Cadence RC/Genus)
- Experience in HW design debugging (using a logic analyzer, ChipScope, JTAG, etc.)
- Analytical thinking, self-sufficiency, and openness to team collaboration
- At least passive knowledge of English
- Familiarity with the area of computer systems and architectures
- Knowledge of versioning tools (Git, SVN)
- Experience with microcontroller programming (e.g. AVR/PIC/ARM/..., JTAG, OpenOCD)
- Knowledge of C++
- Experience with HW verification
- Knowledge of scripting languages (Python, Tcl)
This position is based in our R&D centers in Brno or Prague.