HW Engineer - DeVeRV

DeVeRV · Brno, .
Department DeVeRV
Employment Type Full-Time
Minimum Experience Mid-level

DeVeRV Team works on various projects. Thanks to this, we come into contact with a wide range of technologies, cores, and languages. We implement RISC-V extensions as separate components, which we then integrate into various cores.

There are eight of us in total, including Scrum Master and Product Owner. We all work closely together to best meet the needs of our customers. Since our team has been supported in self-organization and agility from the beginning, we are looking for a person who will also suit such an environment.


  • Implementation of RISC-V extensions
  • Integration of components into the RISC-V cores 
  • Designing and debugging of digital circuits (tracer, waves)
  • Processor development in our architecture language (CodAL)
  • Customization of already existing RISC-V cores
  • Technical specification and documentation writing
  • Synthesis (timing and area optimizations)


  • Around 1-3 years of active usage at least one of HDLs (VHDL/Verilog/SystemVerilog)
  • Knowledge of CPU architecture
  • Experience with digital circuit simulation (e.g., ModelSim)
  • User knowledge of Linux
  • Knowledge of versioning tools (Git, SVN)
  • Basic knowledge of scripting languages (Shell, Bash, Python)
  • Analytical thinking, self-sufficiency, team collaboration
  • Advanced English (CEFR level B2 or higher)


  • Knowledge of RISC-V instruction set
  • Advanced knowledge of computer systems and architecture
  • Ability to write clear and concise code
  • Active interest in the field and self-education
  • Previous experience in digital design
  • Knowledge of C/C++
  • Personal project to show off

Place of work: R&D center Brno, Czech republic or full remote from anywhere in the EU.

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  • Location
    Brno, .
  • Department
  • Employment Type
  • Minimum Experience