Codasip develops RISC-V processors IPs. For easy evaluations and an excellent first impression, we need to wrap the RISC-V into a platform that shows the IPs' capabilities. In other words, the IPs need peripherals, memories, and other blocks. Therefore, it's essential to build such platforms that contain the RISC-V IP and all required peripherals, memories, or additional blocks.
When we have the platforms, we also need to have a set of applications that demonstrate the RISC-V IP capabilities in the context of the platform. The applications can be well-known benchmarks, such as core mark or drystone; they can be custom demos showing the capabilities of in-house peripherals or RISC-V IP (e.g., external interrupts), etc. The applications contain also operating systems, such as FreeRTOS or Linux for Linux capable RISC-V IPs.
Last but not least, we need to have a characterization of the platforms in terms of PPA.
All is nicely documented in a step-by-step manner, so even non-experience junior engineers can go through the evaluation smoothly.
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Place of work: R&D center Brno, Czech republic or full remote from anywhere in the EU.
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