YOUR ROLE:
- Verification of modern RISC-V processors and components
- Working with a wide range of advanced tools by Cadence, Mentor (Veloce Emulation Platform)
- Designing generic solutions and process automation
- Implementing internal verification tools
- Communication with global verification experts
YOU SHOULD HAVE:
- Basic knowledge of VHDL/Verilog, OOP (C++) and RTL simulation
- Analytical thinking, self-sufficiency, team collaboration
- Ability and willingness to learn new technologies
- Advanced English (CEFR level B2 or higher)
NICE-TO-HAVES:
- Experience with HW verification using UVM and SystemVerilog
- Knowledge of versioning tools (Git, SVN)
- Ability to write clear and concise code
- Active interest in the field and self-education
- University degree in a related field
This position can be based in our R&D center in Brno or Prague or can be remote.
